Fabrication of integrated circuits requires that each silicon wafer undergo a series of distinct processes. The silicon wafer which is precoated with one or more thin layers of metals or metal oxides receives a coating of photoresist. The wafer is then light exposed to circuit patterns through a mask containing the circuit patterns. After each such exposure the photoresist is developed and then the underlying coating or coatings are etched. The wafer may then be recoated with photoresist and the process repeated a number of times until complete circuits are built up on the wafer which is then sliced into a plurality of individual chips each containing an identical complete circuit.
During some of these various steps, e.g., exposure and etching it is critical that the wafer be prealigned with respect to some standard prior to being transported into the exposure or etching apparatus. Such prealignment entails the centering of the wafer in the x, y, and .theta. directions according to a predetermined criteria dictated by the particular process to be undergone.
Various methods exist for wafer prealignment. Some of these utilize physical contact of the wafer. However, physical contact methods are often damaging to wafers which are quite fragile. Most other methods employ systems where the wafer is air borne, i.e., transported on a thin film of air. Centering is often accomplished by spinning the wafer by means of appropriately oriented air jets. The wafer is periodically stopped generally by use of a pulsating vacuum source. However, these systems require highly complex optical and electronic interface hardware or else result in unacceptable position errors.